Allows you to design custom digital circuits.

  • Not just fast and parallel, rather build of cells can make digital circuits
  • You have Ram
  • You have Clock Signals
  • other peripherals

Cells

Cells can be connected to form any number of digital circtuits???

Cells are often grouped into logic blocks that are connected together to form a digital circuit, this reconfigurable of interconnected hardware.

  • You can implement a soft core processor, maybe even more than one.
  • Try load RISC-V

Usecases

  • High rare IO
  • DSP Tasks, filtering, compression and computing, higher freqs and bandwidth.
  • FPGA is cheaper to make your design than ASIC
  • FPGAs to prototype your designs and reiterate over and over
  • Put the FPGA in the final product
  • Training NNs or Mining Crypto currency SIMD

WHY

Custom reconfigurable digital logic circuits in an FPGA, you can use it to supplement a processor. Some CPU sources are open which means you can use Create optimised digital circuits. Verification of high number of hardware units before they are out.

Design not Develop

In FPGA we don’t program, we create a design, in a Hardware Description Language.

Its not a sequential set of instructions it’s, like a webpage it loads almost all at once.

Most common are VHDL and Verilog. Both are Register Transfer Level Design, they describe how a circuit moves and manipulates data between registers but don’t dictate how the hardware does it.

We will use Verilog

SystemVerilog

  • Extends
  • Adds features for tresging

High Bench Synthesis

IPBlocks, you can use these when to get features, but you can’t look in them with.

an FPGA Application

  1. Write code in a HDL
  2. Simulate your desing , using GTKwave
  3. Systhesize code, make HDL gate level netlist, using Yoysys
  4. Place and route step Nextpnr, Ascii file nxtpnr makes connections between cells
  5. Icepack binary that can be read by the fpga project icestorm (icepack to convert ascii to binary)
  6. Upload iceprog

APIO does all this for us, but it works with devboards.

  • Install APIO
  • Design is in .v
  • We have a .pcf which is the pin constraints file, gives pins labels
  • All this is going to be in in your board manual you can also find pins in your chip user manual.
  • Change board, change test, connect correct pins to the board
  • It’s very useful to simulate and verify your designs.
  • FPGA looses all the memory on reset, hence we have a spi block and usually flash behind that.
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